“Analysis and Design of Analog Integrated Circuits” by Paul R. Gray and Robert G. Meyer, John Wiley & Sons, Inc. The material also applies to discrete designs. This book taught me to treat NPN transistors as voltage-controlled devices, like JFETs with ridiculously-high transconductance Gfs = Iemitter/26mV.

Remember that inductance is everywhere, so knowledge of RF techniques can be useful for preventing parasitic oscillation. For example, emitter followers exhibit inductive output impedance due to current gain dropping with rising frequency. This inductance resonates with stray capacitance to resonate in the VHF range, enabling parasitic oscillation. This can be a problem even in low-speed circuits, as modern devices are faster than their old equivalents.

When testing a new analog design, try waving your hand very close to the circuitry without touching the circuitry. If the circuit’s behavior changes, you likely have an RF parasitic oscillation, or a sensitivity to radio-station pickup.

If your circuit is noisier than it should be, suspect RF parasitics or pickup. If the noise is in the audio frequency range, listen to the noise. Can you hear music in the noise? If you hear music, check for a 19-kHz spectral line: the FM-stereo pilot tone.

Dead-bug ugly construction, where unetched copper-clad board is used as the ground plane and leads are kept short, is excellent for prototyping. Dead-bug refers to chips placed on their backs on the copper plane with their leads sticking up in the air. Solder wire-leaded bypass capacitors between power pins and the ground plane with zero lead length. SMT capacitors will work, but tend to fracture apart. Solder mimimum lead length wires between ground pins and the ground plane.

I recall teaching these techniques to colleagues over fifty years ago.